[–] 2 points 2 days ago

It's not that simple from the manufacturers perspective.

Setting up a new fab takes years. Usually 5 or more for a grounds up build. Less for an upgrade (1-2 years or so). Lots of in-progress fabs have been sped up and we will see more supply sooner, but not soon enough.

Making less HBM and more DDR RAM doesn't make sense for $hareholders, so we are stuck with getting supply at a trickle such that the marginal cost for both is equal or it's a contract with a penalty larger than any profits

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  • [–] 5 points 3 days ago

    Simply lovely. There long names are for mounting since they are persistent w ross reboots.

    The short ones can change of there are no mounting options or more or fewer devices than before.

    PS: even the networking devices have this funky naming

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  • [–] 2 points 6 days ago (3 children)

    Most white bread sold in supermarkets is preservative full, even in Europe and Japan. It's required because the supply chain (from baking to on shelf) itself costs at least half a day or a full day depending on the setup.

    A similar bread baked at home has a shelf life of 2-3 days before it is not fluffy soft anymore. This puts a big constraint as the feedback for the next batch is literally time critical. A longer shelf life enables bulk distribution per store which reduces logistics cost and improves per unit cost

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  • [–] 0 points 6 days ago (8 children)

    So.... The bread in supermarket is high in preservative chemicals, which is why it can stay 'fresh' for days. The one from a local bakery (boulangerie or pattisere or whatever) will have a shorter shelf life since they don't have a long supply chain to manage

    There's not much evidence that the preservatives are bad or the supermarket bread is inferior, but I do miss the fresh smell and crack of the bread when I end up eating the (imo inferior) supermarket bread

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  • [–] 1 point 6 days ago

    Once a model knows python 3.14 there's little need to update it until 3.14 is EOL. Most professional settings pin dependencies and runtimes and only move them for security issues or planned migrations.

    Several embedded platform only support C++14 as the latest target. That's a lag of 10 or more years. This is similar to how the calculator chips are redone once a decade or so depending on new fab process giving enough benefits. Once something gets used for years, a large investment makes more sense than the current senseless frontier models every month or two.

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  • [–] 2 points 1 week ago (2 children)

    A calculator hasn't changed much since 1990s. The world has moved on, but it still does the one thing cheaply and reliably. We had hiccups in beginning (expense, limited precision, etc.) and now we have phones and computers to eclipse it, but we still have calculators being produced, sold and used. Once you found a model to fit a use case, it can freeze till you can justify the expense of upgrading the processes around it.

    Wrt your questions: I love that you are asking the right ones. You can delve into deep infer for more details on diff tradeoffs between batching and latency for the specific DeepSeek case. In general, more users allow larger batches and higher efficiency as well as better amortization.

    S curves are genuine problems, though engineers are pretty good at finding something else to offset the slowdown. Computer chips, batteries, solar panels, fiber optics have been pretty good examples of scaling in hardware space. Signalling (Mobile LTE, WiFi, optical trancievers), games, etc. have shown scaling in mixed hw and SW space.

    Scaling might stop for one thing, but then people focus on a diff item to still continue the forward progress. What would that look for models? I don't have a strong idea, but we have already seen MoE, KV Cache quantization, RL Post Training, etc. as major knobs beyond just scaling model size, with each new knob showcasing the same logistics curve behavior. From HW front, there has been incessant march since 70s, where we have seen multiple plateaus and the engineers still moving the frontier ahead. Freq Wall was hit at 2GHz and we have 6 GHz chips now, at a slower pace but still. Memory Wall was hit and yet HAMR and multi level cells have given us densities like never before.

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