Dude, pick a lane.

On one hand you're claiming RISC is bad because performance. On the other hand you're saying the difference is important due to cybersecurity.

On the first point I've already proven you wrong. And the second point.... RISC is actually safer for a number of reasons than CISC.

So are you for, or against RISC? Because both topics you picked support RISC pretty much unilaterally.

Also might I add that right now the only truly viable open future architecture is RISC-V, which is getting to a point where we can blend together MCUs and CPUs based purely on available extra hardware on silicon. Meaning same tooling will be able to compile the same code regardless if you want to run it on a sensor array that lasts a year on a single coin cell, or a powerful processing node (okay okay arguably RISC-V isn't completely there for truly high performance computing, but there's already cheap SoCs with Pi3 comparable performance, and the market is just gearing up for better ones. Oh and if your goal is AI, pretty solid 16TOPS in a low power package).